Referring to FIG. 1, U.S. Pat. No. 8,652,879 B2 discloses a method for making a semiconductor package. The method involves forming a plurality of spaced-apart die pads 122 and a plurality of spaced-apart contact pads 124 on a metallic substrate 112 using electro-plating techniques, and then respectively disposing a plurality of die chips 132 on the die pads 122. Thereafter, each of the die chips 122 is electrically connected to one or more of the contact pads 124 using wires 134, followed by encapsulating the die chips 122 and the wires 134 with a molding material 142 to form a packaged semiconductor package assembly. Finally, the metallic substrate 112 is removed and then the semiconductor package assembly is singularized using dicing techniques to form a plurality of the semiconductor packages.
In the above structure of the semiconductor package assembly, there is a height difference from the die pads 122 to the metallic substrate 112. In light of the trend toward increased density of the semiconductor package assembly, and thus decreased size of the die pads 122, when the die pads 122 are miniaturized to have a size smaller than that of the die chips 132, the die chips 132 may tilt or move in the subsequent manufacturing process due to insufficient support provided by the die pads 122.